JPH079378Y2 - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JPH079378Y2
JPH079378Y2 JP1985048119U JP4811985U JPH079378Y2 JP H079378 Y2 JPH079378 Y2 JP H079378Y2 JP 1985048119 U JP1985048119 U JP 1985048119U JP 4811985 U JP4811985 U JP 4811985U JP H079378 Y2 JPH079378 Y2 JP H079378Y2
Authority
JP
Japan
Prior art keywords
semiconductor chip
adhesive
plastic film
substrate
copper foil
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1985048119U
Other languages
English (en)
Japanese (ja)
Other versions
JPS61166534U (en]
Inventor
信幸 山村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Casio Computer Co Ltd
Original Assignee
Casio Computer Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Casio Computer Co Ltd filed Critical Casio Computer Co Ltd
Priority to JP1985048119U priority Critical patent/JPH079378Y2/ja
Publication of JPS61166534U publication Critical patent/JPS61166534U/ja
Application granted granted Critical
Publication of JPH079378Y2 publication Critical patent/JPH079378Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83194Lateral distribution of the layer connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/1015Shape
    • H01L2924/10155Shape being other than a cuboid
    • H01L2924/10158Shape being other than a cuboid at the passive surface

Landscapes

  • Wire Bonding (AREA)
  • Die Bonding (AREA)
JP1985048119U 1985-04-02 1985-04-02 半導体装置 Expired - Lifetime JPH079378Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1985048119U JPH079378Y2 (ja) 1985-04-02 1985-04-02 半導体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1985048119U JPH079378Y2 (ja) 1985-04-02 1985-04-02 半導体装置

Publications (2)

Publication Number Publication Date
JPS61166534U JPS61166534U (en]) 1986-10-16
JPH079378Y2 true JPH079378Y2 (ja) 1995-03-06

Family

ID=30564069

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1985048119U Expired - Lifetime JPH079378Y2 (ja) 1985-04-02 1985-04-02 半導体装置

Country Status (1)

Country Link
JP (1) JPH079378Y2 (en])

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5277587A (en) * 1975-12-23 1977-06-30 Seiko Epson Corp Wiring of integrated circuit outside chip
JPS56110659U (en]) * 1980-12-22 1981-08-27

Also Published As

Publication number Publication date
JPS61166534U (en]) 1986-10-16

Similar Documents

Publication Publication Date Title
US5717252A (en) Solder-ball connected semiconductor device with a recessed chip mounting area
JP2981141B2 (ja) グリッドアレイ・プラスチックパッケージ、およびその製造方法、およびその製造に使用されるプラスチック積層体、およびその製造方法
KR960043137A (ko) 반도체장치와 반도체장치의 제조방법 및 리드프레임의 제조방법
US5559366A (en) Lead finger tread for a semiconductor lead package system
JPH079378Y2 (ja) 半導体装置
JP4334047B2 (ja) 半導体装置とその製造方法
US6181003B1 (en) Semiconductor device packaged in plastic package
US20040036178A1 (en) Flip-chip mounted integrated circut card element
JPH06163746A (ja) 混成集積回路装置
JPS6334281Y2 (en])
JPH03297152A (ja) 半導体装置の製造法
JPH06334070A (ja) 混成集積回路装置
JPH07170048A (ja) フレキシブルプリント配線板の部品実装構造及び部品実装方法
JP3082507U (ja) ダブルサイドチップパッケージ
JP2503029B2 (ja) 薄型構造の半導体装置の製造方法
JP3705235B2 (ja) 半導体装置の製造方法
JPH11121515A (ja) 半導体チップの実装方法および半導体装置
JPH0726139Y2 (ja) Icカード
JP2570123B2 (ja) 半導体装置及びその製造方法
JPH04115540A (ja) 放熱板付き半導体装置の製造方法
JPS6214698Y2 (en])
KR940007537B1 (ko) 시트형 반도체 패키지 및 그 제조방법
JPH0617288Y2 (ja) 半導体装置
JP2854192B2 (ja) 混成集積回路装置
JPH06140534A (ja) 混成集積回路装置